SPC564L54L5 datasheet(102/160 Pages) STMICROELECTRONICS

102 / 160 page

Electrical characteristics

SPC56XL60/54

102/160

Doc ID 15457 Rev 8

References

Semiconductor Equipment and Materials International

3081 Zanker Road

San Jose, CA 95134 USA

(408) 943-6900

MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering

Documents at 800-854-7179 or 303-397-7956.

JEDEC specifications are available on the WEB at http://www.jedec.org.

C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an

Automotive Engine Controller Module,” Proceedings of SemiTherm, San Diego, 1998,

pp. 47–54.

G. Kromann, S. Shidore, and S. Addison, “Thermal Modeling of a PBGA for Air-Cooled

Applications,” Electronic Packaging and Production, pp. 53–58, March 1998.

B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal

Resistance and Its Application in Thermal Modeling,” Proceedings of SemiTherm, San

Diego, 1999, pp. 212–220.

3.5

Electromagnetic Interference (EMI) characteristics

The characteristics in Table 15 were measured using:

●

Device configuration, tet conditions, and EM testing per standard IEC61967-2

●

Supply voltage of 3.3 V DC

●

Ambient temperature of 25

°C

The configuration information referenced in Table 15 is explained in Table 14.

Table 14.

EMI configuration summary

Configuration name

Description

Configuration A

– High emission = all pads have max slew rate, LVDS pads running at 40 MHz

– Oscillator frequency = 40 MHz

– System bus frequency = 80 MHz

– No PLL frequency modulation

– IEC level I (

≤ 36 dBμV)

Configuration B

– Reference emission = pads use min, mid and max slew rates, LVDS pads disabled

– Oscillator frequency = 40 MHz

– System bus frequency = 80 MHz

– 2% PLL frequency modulation

– IEC level K(

≤ 30 dBμV)

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