SPC564L54L5 datasheet(28/160 Pages) STMICROELECTRONICS

28 / 160 page

Introduction

SPC56XL60/54

28/160

Doc ID 15457 Rev 8

Analog part:

●

2 on-chip ADCs

–

12-bit resolution SAR architecture

–

Same digital interface as in the SPC560P family

–

A/D Channels: 9 external, 3 internal and 4 shared with other A/D (total 16

channels)

–

One channel dedicated to each T-sensor to enable temperature reading during

application

–

Separated reference for each ADC

–

Shared analog supply voltage for both ADCs

–

One sample and hold unit per ADC

–

Adjustable sampling and conversion time

Digital part:

●

4 analog watchdogs comparing ADC results against predefined levels (low, high,

range) before results are stored in the appropriate ADC result location

●

2 modes of operation: CPU Mode or CTU Mode

●

CPU mode features

–

ADC state machine managing three request flows: regular command, hardware

injected command, software injected command

–

Selectable priority between software and hardware injected commands

–

4 analog watchdogs comparing ADC results against predefined levels (low, high,

range)

–

DMA compatible interface

●

CTU mode features

–

Triggered mode only

–

4 independent result queues (1

× 16 entries, 2 × 8 entries, 1 × 4 entries)

–

Result alignment circuitry (left justified; right justified)

–

32-bit read mode allows to have channel ID on one of the 16-bit parts

–

DMA compatible interfaces

●

Built-in self-test features triggered by software

1.5.34

Cross Triggering Unit (CTU)

The ADC cross triggering unit allows automatic generation of ADC conversion requests on

user selected conditions without CPU load during the PWM period and with minimized CPU

load for dynamic configuration.

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