– 13 –

CXP85112B/85116B, CXP85220A/85224A/85228A/85232A

(2) Serial transfer

Item

SCK cycle time

SCK

Input mode

Output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

1000

8000/fc

400

4000/fc – 50

100

200

200

100

200

100

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

SCK

SI

SI

SO

SCK High and Low level

widths

SI input setup time

(for SCK

↑)

SI input hold time

(for SCK

↑)

SCK

↓ → SO delay time

Symbol

Pins

Conditions

Min.

Max.

Unit

Note) The load condition for the SCK output mode, SO output delay time is 50pF + 1TTL.

Fig. 4. Serial transfer timing

SO

Output data

Input data

SI

SCK