WM8980CGEFLSLASHV datasheet(20/123 Pages) WOLFSON

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WM8980

Pre-Production

PP, Rev 3.8, May 2012

Figure 8 Typical Power up Sequence where DVDD is Powered before AVDD

Figure 8 shows a typical power-up sequence where DVDD comes up first. First it is assumed that

DVDD is already up to specified operating voltage. When AVDD goes above the minimum threshold,

Vpora, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held in

reset. In this condition, all writes to the control interface are ignored. When AVDD rises to Vpora_on,

PORB is released high and all registers are in their default state and writes to the control interface

may take place.

On power down, where DVDD falls first, PORB is asserted low whenever DVDD drops below the

minimum threshold Vpord_off.

SYMBOL

MIN

TYP

MAX

UNIT

Vpora

0.4

0.6

0.8

Vpora_on

0.9

1.2

1.6

Vpora_off

0.4

0.6

0.8

Vpord_on

0.5

0.7

0.9

Vpord_off

0.4

0.6

0.8

Table 3 Typical POR Operation (typical values, not tested)

Notes:

If AVDD and DVDD suffer a brown-out (i.e. drop below the minimum recommended operating

level but do not go below Vpora_off or Vpord_off) then the chip will not reset and will resume normal

operation when the voltage is back to the recommended level again.

The chip will enter reset at power down when AVDD or DVDD falls below Vpora_off or Vpord_off. This

may be important if the supply is turned on and off frequently by a power management system.

The minimum tpor period is maintained even if DVDD and AVDD have zero rise time. This

specification is guaranteed by design rather than test.

WM8980CGEFL/V 데이터시트(PDF) 20 Page - Wolfson Microelectronics plc

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