PXR40 datasheet(69/100 Pages) FREESCALE

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Electrical characteristics

PXR40 Microcontroller Data Sheet, Rev. 1

Freescale Semiconductor

5.9.1

ADC internal resource measurements

8 Exceeding limit may cause conversion error on stressed channels and on unstressed channels. Transitions within the limit do

not affect device reliability or cause permanent damage.

9 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate

resistance values using VPOSCLAMP =VDDA + 0.5 V and VNEGCLAMP = –0.3 V, then use the larger of the calculated values.

10 Condition applies to two adjacent pins at injection limits.

11 Performance expected with production silicon.

12 All channels have same 10 k

 <Rs<100 kChannel under test has Rs = 10 k, I

INJ=IINJMAX,IINJMIN.

13 The TUE specification is always less than the sum of the INL, DNL, offset, and gain errors due to cancelling errors.

14 TUE does not apply to differential conversions.

15 Voltages between VRL and VRH will not cause damage to the pins. However, they may not be converted accurately if the

differential voltage is above the maximum differential voltage. In addition, conversion errors may occur if the common mode

voltage of the differential signal violates the Differential Input common mode voltage specification.

Table 18. Power Management Control (PMC) specification

Spec

Characteristic

Symbol

Min

Typical

Max

Unit

PMC Normal Mode

Bandgap 0.62 V

ADC0 channel 145

VADC145

—

0.62

—

Bandgap 1.2 V

ADC0 channel 146

VADC146

—

1.22

—

Vreg1p2 Feedback

ADC0 channel 147

VADC147

—

VDD /2.045

—

4LVD 1.2 V

ADC0 channel 180

VADC180

—

VDD /1.774

—

Vreg3p3 Feedback

ADC0 channel 181

VADC181

—

Vreg3p3 / 5.460

—

6LVD 3.3 V

ADC0 channel 182

VADC182

—

Vreg3p3 / 4.758

—V

7LVD 5.0 V

ADC0 channel 183

— LDO mode

— SMPS mode

VADC183

—

VDDREG / 4.758

VDDREG/7.032

—

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