PXR40 datasheet(79/100 Pages) FREESCALE

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Electrical characteristics

PXR40 Microcontroller Data Sheet, Rev. 1

Freescale Semiconductor

Figure 13. JTAG test clock input timing

TCK Low to TDO Data Invalid

tTDOI

0—

TCK Low to TDO High Impedance

tTDOHZ

—20

JCOMP Assertion Time

tJCMPPW

100

—

JCOMP Setup Time to TCK Low

tJCMPS

—

TCK Falling Edge to Output Valid

tBSDV

—50

TCK Falling Edge to Output Valid out of High Impedance

tBSDVZ

—50

TCK Falling Edge to Output High Impedance

tBSDHZ

—50

Boundary Scan Input Valid to TCK Rising Edge

tBSDST

—

TCK Rising Edge to Boundary Scan Input Invalid

tBSDHT

—

1 JTAG timing specified at V

DD = 1.08 V to 1.32 V, VDDE = 3.0 V to 3.6 V, VDD33 and VDDSYN = 3.0 V to 3.6 V, TA =TL to TH, and

CL = 30 pF with DSC = 0b10, SRC = 0b00. These specifications apply to JTAG boundary scan only. See Table 32 for functional

specifications.

Table 31. JTAG pin AC electrical characteristics1 (continued)

Spec

Characteristic

Symbol

Min

Max

Unit

TCK

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