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ADG5433 데이터시트(PDF) 21 Page - Analog Devices

부품명 ADG5433
상세설명  High Voltage Latch-Up Proof, Triple/Quad SPDT Switches
PDF  24 Pages
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ADG5433 데이터시트(HTML) 21 Page - Analog Devices

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Data Sheet
ADG5433/ADG5434
Rev. B | Page 21 of 24
OUTLINE DIMENSIONS
16
9
8
1
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09
0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 37. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
2.70
2.60 SQ
2.50
COMPLIANT
TO JEDEC STANDARDS MO-220-WGGC.
1
0.65
BSC
BOTTOM VIEW
TOP VIEW
16
5
8
9
12
13
4
EXPOSED
PAD
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
0.45
0.40
0.35
SEATING
PLANE
0.80
0.75
0.70
0.05 MAX
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
0.35
0.30
0.25
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Figure 38. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-17)
Dimensions shown in millimeters



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