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ADP5050ACPZ-R7 데이터시트(PDF) 49 Page - Analog Devices

부품명 ADP5050ACPZ-R7
상세설명  5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator
PDF  60 Pages
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ADP5050ACPZ-R7 데이터시트(HTML) 49 Page - Analog Devices

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Data Sheet
ADP5050
Rev. 0 | Page 49 of 60
REGISTER 10: HICCUP_CFG (HICCUP CONFIGURATION), ADDRESS 0x0A
Register 10 is used to configure the SYNC/MODE pin as a synchronization input or output and to configure hiccup protection for each
channel. The default value for hiccup protection can be programmed by factory fuse (hiccup function enabled or disabled for all four
buck regulators).
Table 37. Register 10 Bit Assignments
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SYNC_OUT
Reserved
HICCUP4_OFF
HICCUP3_OFF
HICCUP2_OFF
HICCUP1_OFF
Table 38. HICCUP_CFG Register, Bit Function Descriptions
Bits
Bit Name
Access
Description
7
SYNC_OUT
R/W
The default value can be programmed by factory fuse.
0 = configure the SYNC/MODE pin as a clock synchronization input if a clock is connected (default).
1 = configure the SYNC/MODE pin as a clock synchronization output.
[6:4]
Reserved
R/W
Reserved.
3
HICCUP4_OFF
R/W
The default value can be programmed by factory fuse.
0 = enable hiccup protection for Channel 4.
1 = disable hiccup protection for Channel 4 (short-circuit protection is disabled automatically).
2
HICCUP3_OFF
R/W
The default value can be programmed by factory fuse.
0 = enable hiccup protection for Channel 3.
1 = disable hiccup protection for Channel 3 (short-circuit protection is disabled automatically).
1
HICCUP2_OFF
R/W
The default value can be programmed by factory fuse.
0 = enable hiccup protection for Channel 2.
1 = disable hiccup protection for Channel 2 (short-circuit protection is disabled automatically).
0
HICCUP1_OFF
R/W
The default value can be programmed by factory fuse.
0 = enable hiccup protection for Channel 1.
1 = disable hiccup protection for Channel 1 (short-circuit protection is disabled automatically).



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