Z8018010VSC datasheet(33/85 Pages) ZILOG

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Z80180

Microprocessor Unit

PS014004-1106

Architecture

tSRSI

CSIO Receive Data Set-up Time (Internal Clock

Operation)

1–tcyc

tSRHI

CSIO Receive Data Hold Time (Internal Clock

Operation)

1–tcyc

tSRSE

CSIO Receive Data Set-up Time (External Clock

Operation)

1–tcyc

tSRHE

CSIO Receive Data Hold Time (External Clock

Operation)

1–tcyc

tRES

RESET Set-up Time to Ø Fall

100

–

tREH

RESET Hold Time from Ø Fall

–

tOSC

Oscillator Stabilization Time

–

tEXr

External Clock Rise Time (EXTAL)

–

tEXf

External Clock Fall Time (EXTAL)

–

tRr

RESET Rise Time

–

tRf

RESET Fall Time

–

tIr

Input Rise Time (except EXTAL, RESET)–

100

tIf

Input Fall Time (except EXTAL, RESET)–

100

Table 9. Z80180-10 AC Characteristics

Symbol Item

Z80180-10

Unit

Min

Max

1tcyc

Clock Cycle Time

100

2000 ns

2tCHW

Clock H Pulse Width

–

3tCLW

Clock L Pulse Width

–

4tcf

Clock Fall Time

–

5tcr

Clock Rise Time

–

6tAD

ØRise to Address Valid Delay

–

7tAS

Address Valid to MREQ Fall or IORQ Fall)

–

Table 8. Z80180-8 AC Characteristics (continued)

Symbol Item

Z80180-8

Unit

Min

Max

Z8018010VSC 데이터시트(PDF) 33 Page - Zilog, Inc.

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