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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MMPF0100NPEP 데이터시트(PDF) 5 Page - Freescale Semiconductor, Inc |
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MMPF0100NPEP 데이터시트(HTML) 5 Page - Freescale Semiconductor, Inc |
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5 / 137 page  Analog Integrated Circuit Device Data Freescale Semiconductor 5 PF0100 Internal Block Diagram 2 Internal Block Diagram Figure 2. Simplified Internal Block Diagram VIN LICELL SWBSTFB SWBSTIN SWBSTLX O/P Drive SWBST 600 mA Boost SCL SDA VDDIO SW3A/B Single/Dual DDR 2500 mA Buck VCOREDIG VCOREREF GNDREF SW1CFB SW1AIN SW1C 2000 mA Buck SW1FB SW1ALX SW1BLX SW1A/B Single/Dual 2500 mA Buck SW1VSSSNS VSNVS Li Cell Charger SW2 2000 mA Buck VGEN1 100 mA VGEN1 VIN1 VGEN2 250 mA VGEN2 VGEN3 100 mA VGEN3 VIN2 VGEN4 350 mA VGEN4 VGEN5 100 mA VGEN5 VIN3 VGEN6 200 mA VGEN6 Best of Supply OTP SW4 1000 mA Buck VREFDDR VDDOTP VINREFDDR VHALF VCORE PF0100 CONTROL Clocks 32 kHz and 16 MHz Initialization State Machine I 2C Interface Clocks and resets I 2C Register map Trim-In-Package O/P Drive O/P Drive SW1BIN SW1CLX O/P Drive SW1CIN SW2FB SW2LX O/P Drive SW2IN SW2IN SW3AIN SW3AFB SW3ALX SW3BLX O/P Drive O/P Drive SW3BIN SW3BFB SW3VSSSNS SW4IN SW4FB SW4LX O/P Drive Supplies Control DVS Control DVS CONTROL Reference Generation Core Control logic GNDREF1 |
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