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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MMPF0100NPEP 데이터시트(PDF) 20 Page - Freescale Semiconductor, Inc |
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MMPF0100NPEP 데이터시트(HTML) 20 Page - Freescale Semiconductor, Inc |
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20 / 137 page  Analog Integrated Circuit Device Data 20 Freescale Semiconductor PF0100 Functional Block Requirements and Behaviors Start-up Figure 6. Default Start-up Sequence Table 9. Default Start-up Sequence Timing Parameter Description Min Typ Max Unit tD1 Turn-on delay of VSNVS (21) –15– ms tR1 Rise time of VSNVS – 3.0 – ms tD2 User determined delay – 1.0 – ms tR2 Rise time of PWRON – (22) –ms tD3 Turn-on delay of first regulator SEQ_CLK_SPEED[1:0] = 00 – 2.0 – ms SEQ_CLK_SPEED[1:0] = 01(23) –2.5 – SEQ_CLK_SPEED[1:0] = 10 – 4.0 – SEQ_CLK_SPEED[1:0] = 11 – 7.0 – *VSNVS will start from 1.0 V if LICELL is valid before VIN. UVDET LICELL VIN VSNVS PWRON SW1A/B SW1C SW2 VGEN2 SW3A/B SW4 VREFDDR VGEN4 VGEN5 VGEN6 RESETBMCU td1 td3 td4 td4 tr1 tr3 tr3 tr3 td5 tr4 tr2 td2 1V |
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