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DOC7707 데이터시트(PDF) 193 Page - List of Unclassifed Manufacturers |
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DOC7707 데이터시트(HTML) 193 Page - List of Unclassifed Manufacturers |
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193 / 307 page ![]() 193 7707F–AVR–11/10 AT90USB82/162 19.9 Registers description 19.9.1 USB general registers • 7 – USBE: USB macro Enable Bit Set to enable the USB controller. Clear to disable and reset the USB controller, to disable the USB transceiver and to disable the USB controller clock inputs. • 6 – Reserved The value read from this bit is always 0. Do not set this bit. • 5 – FRZCLK: Freeze USB Clock Bit Set to disable the clock inputs (the ”Resume Detection” is still active). This reduces the power consumption. Clear to enable the clock inputs. • 4-0 – Reserved The value read from these bits is always 0. Do not set these bits. • 7 – DPACC: DPRAM Direct Access Bit Set this bit to directly read the content the Dual-Port RAM (DPR) data through the UEDATX or UPDATX registers. See Section 19.6, page 190 for more details. Clear this bit for normal operation and access the DPR through the endpoint FIFO. • 6-0 – Reserved The value read from these bits is always 0. Do not set these bits. Bit 7 6 5432 10 USBE - FRZLK - -- --USBCON Read/Writ e R/W R R/W RRR RR Initial Val- ue 00 1000 00 Bit 76543210 DPACC -------UDPADDH Read/Wr ite R/W RRRRRRR Initial Value 00000000 Bit 7 65 432 10 DPADD7:0 UDPADDL Read/Writ e R/W R/W R/W R/W R/W R/W R/W R/W Initial Val- ue 0 0 0 000 00 |
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