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DOC7707 데이터시트(PDF) 48 Page - List of Unclassifed Manufacturers |
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DOC7707 데이터시트(HTML) 48 Page - List of Unclassifed Manufacturers |
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48 / 307 page ![]() 48 7707F–AVR–11/10 AT90USB82/162 device is kept in RESET after V CC rise. The RESET signal is activated again, without any delay, when V CC decreases below the detection level. Figure 9-2. MCU Start-up, RESET Tied to V CC Figure 9-3. MCU Start-up, RESET Extended Externally 9.4 External Reset An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the minimum pulse width (see Table 9-1) will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the Reset Threshold Voltage – V RST – on its positive edge, the delay counter starts the MCU after the Time-out period – t TOUT – has expired. Figure 9-4. External Reset During Operation V RESET TIME-OUT INTERNAL RESET t TOUT V POT V RST CC RESET TIME-OUT INTERNAL RESET t TOUT V POT V RST VCC CC |
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