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VMV3 데이터시트(PDF) 135 Page - Microsemi Corporation |
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VMV3 데이터시트(HTML) 135 Page - Microsemi Corporation |
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135 / 212 page ![]() Military ProASIC3/EL Low Power Flash FPGAs Revision 3 2-121 Global Resource Characteristics A3P1000 Clock Tree Topology Clock delays are device-specific. Figure 2-42 is an example of a global tree used for clock routing. The global tree presented in Figure 2-42 is driven by a CCC located on the west side of the A3P1000 device. It is used to drive all D-flip-flops in the device. Figure 2-42 • Example of Global Tree Use in an A3P1000 Device for Clock Routing Central Global Rib VersaTile Rows Global Spine CCC |
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