AD-DPGIOZ datasheet(34/61 Pages) AD

34 / 61 page

AD9961/AD9963

Data Sheet

Rev. A | Page 34 of 60

Address

Bit(s)

Parameter

Function

RX_DC

0: the ADC common-mode buffer is active. This sets the ADC inputs to

the desired common-mode voltage through 10 kΩ resistors to each

single sided input.

1: disables the common-mode buffer. The buffer should be disabled

whenever the user DC couples to the ADC inputs.

IGAIN CAL MSBs

0x7F

7:0

RXI_Trim[9:2]

The RXI_Trim[9:0] word is used to adjust the gain of the receive path I

ADC. These bits have no effect unless the RXTrim_EN bit is set. The

RXTrim_Fine bit reduces the LSB size of the calibration word by ½.

IGAIN CAL LSBS

0x80

7:3

Unused

2:1

RXI_Trim[1:0]

GAINCAL_ENI

1: enables the gain calibration DAC for the I Rx ADC.

IGAIN CAL MSBs

0x81

7:0

RXQ_Trim[9:2]

The RXQ_Trim[9:0] word is used to adjust the gain of the receive path Q

ADC. These bits have no effect unless the RXTrim_EN bit is set. The

RXTrim_Fine bit reduces the LSB size of the calibration word by ½.

IGAIN CAL LSBs

0x82

7:3

Unused

2:1

RXQ_Trim[1:0]

Bottom two LSBs of RXQ_Trim described in Register 0x81 above.

GAINCAL_ENQ

1: enables the gain calibration DAC for the Q Rx ADC.

DDLL Lock Bits

0x84

TXDDLL lock bit

0: TXDDLL is unlocked.

1: TXDDLL is locked.

RXDDLL lock bit

0: RXDDLL is unlocked.

1: RXDDLL is locked.

IGAIN CAL LSBS

0xFF

7:1

Unused

Update

Synchronously transfers ADC configuration data from the global register

set to the local ADC register set and activates the changes. A 0-to-1

transition is required to initiate the transfer.

1: transfer ADC parameters to ADC to make changes active.

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