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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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APA600 데이터시트(PDF) 74 Page - Actel Corporation |
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APA600 데이터시트(HTML) 74 Page - Actel Corporation |
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74 / 178 page  ProASICPLUS Flash Family FPGAs 2- 64 v5.9 Synchronous Write and Asynchronous Read to the Same Location Note: The plot shows the normal operation status. Figure 2-37 • Synchronous Write and Asynchronous Read to the Same Location Table 2-61 • TJ = 0°C to 110°C; VDD = 2.3 V to 2.7 V for Commercial/Industrial TJ = –55°C to 150°C, VDD = 2.3 V to 2.7 V for Military/MIL-STD-883 Symbol txxx Description Min. Max. Units Notes ORDA New DO access from RB ↓ 7.5 ns ORDH Old DO valid from RB ↓ 3.0 ns OWRA New DO access from WCLKS ↓ 3.0 ns OWRH Old DO valid from WCLKS ↓ 0.5 ns RAWCLKS RB ↓ or RADDR from WCLKS ↑ 5.0 ns RAWCLKH RB ↑ or RADDR from WCLKS ↓ 5.0 ns Notes: 1. During an asynchronous read cycle, each write operation (synchronous or asynchronous) to the same location will automatically trigger a read operation which updates the read data. 2. Violation of RAWCLKS will disturb access to OLD data. 3. Violation of RAWCLKH will disturb access to NEWER data. RB, RADDR OLD NEWNEWER t ORDA t ORDH t RAWCLKS t RAWCLKH WCLKS DO t OWRH t OWRA |
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