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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ZIOL2102 데이터시트(PDF) 48 Page - List of Unclassifed Manufacturers |
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ZIOL2102 데이터시트(HTML) 48 Page - List of Unclassifed Manufacturers |
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48 / 91 page  ZIOL2xxx – IC Family IO-Link compliant HV Line Driver IC Family Data Sheet January 31, 2012 © 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.2.1 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to changes without notice. 48 of 90 The WURQ indication is a dedicated IO-Link functionality. A WURQ event is indicated if an over current situation with a determined timing – regarding to IO-Link Communication Specification happened on one of the output driver stages (refer to chapter 3.3.4, 3.3.10.1 and 8). A WURQ event will be created if there is either a timely limited (typical 80µs) different logical value between the logical output value of the driver and the received logical value from the line or an also timely limited (typical 80µs) over-current at the considered channel. It can be configured whether the first or the last or both conditions lead to a WURQ event. 3.3.10.2. IC Lock Mode Configuration and Monitoring If the current through the output driver exceeds the configured limit, an exception will be generated. In addition to that and depending on the Ics configuration, the lock mode operation which corresponds to the overloaded channel can be performed (refer to Figure 3.15 and Figure 3.16). The above mentioned lock mode operation is activated if either one driver stage (HS or LS) or both drivers stages (HS and LS stage) are overloaded, means the output current exceeds the configured limit. If the event occurs, the corresponding driver stage will be set to a save state, meaning it will be disabled. The Lock mode configuration as shown in the following figures (Figure 3.15, Figure 3.16, Figure 3.17) is based on configurable current limits and time periods. |
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