NG80960JS25 datasheet(37/86 Pages) INTEL

37 / 86 page

80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor

Datasheet

When the regulator cannot prevent the 2.25 V differential, the addition of the resistor is a simple

and reliable method for limiting current. The resistor may also prevent damage in the case of a

power failure, where the 5 V supply remains on and the 3.3 V supply goes to zero.

4.5

VCCPLL Pin Requirements

To reduce clock skew on the 80960Jx processor, the VCCPLL pin for the Phase Lock Loop (PLL)

circuit is isolated on the pinout. The lowpass filter, as shown in Figure 9, reduces noise induced

clock jitter and its effects on timing relationships in system designs. The 4.7 µF capacitor must be

low ESR solid tantalum; the 0.01 µF capacitor must be of the type X7R and the node connecting

VCCPLL must be as short as possible.

When the voltage on the VCCPLL power supply pin exceeds the VCC pin voltage by 0.5 V at any

time, including the power up and power down sequences, excessive currents may permanently

damage on-chip electrostatic discharge (ESD) protection diodes. The damage may accumulate over

multiple episodes.

In actual applications, this problem occurs only when the VCCPLL and VCC pins are driven by

separate power supplies or voltage regulators. Applications that use one power supply for

VCCPLL and VCC are not typically at risk. Verify that your application does not allow the

VCCPLL voltage to exceed VCC by 0.5 V.

The VCCPLL low-pass filter recommendation does not promote this problem.

Table 19. VDIFF Parameters

Symbol

Parameter

Min

Max

Units

Notes

VDIFF

VCC5-VCC

Difference

2.25

VCC5 input should not exceed VCC by more than 2.25 V

during power-up and power-down, or during steady-

state operation.

Figure 9. VCCPLL Lowpass Filter

100

VCC

(Board Plane)

VCCPLL

(On 80960Jx)

Ω (80960JA/JF/JD)

F_CA078A

0.01 µF

4.7 µF

Ω (80960JS/JC/JT)

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