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ADF7021 데이터시트(PDF) 41 Page - Analog Devices |
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ADF7021 데이터시트(HTML) 41 Page - Analog Devices |
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41 / 64 page ![]() Data Sheet ADF7021 Rev. B | Page 41 of 64 PACKET STRUCTURE AND CODING The suggested packet structure to use with the ADF7021 is shown in Figure 53. PREAMBLE SYNC WORD ID FIELD DATA FIELD CRC Figure 53. Typical Format of a Transmit Protocol Refer to the Receiver Setup section for information on the required preamble structure and length for the various modulation schemes. PROGRAMMING AFTER INITIAL POWER-UP Table 22 lists the minimum number of writes needed to set up the ADF7021 in either Tx or Rx mode after CE is brought high. Additional registers can also be written to tailor the part to a particular application, such as setting up sync byte detection or enabling AFC. When going from Tx to Rx or vice versa, the user needs to toggle the Tx/Rx bit and write only to Register 0 to alter the LO by 100 kHz. Table 22. Minimum Register Writes Required for Tx/Rx Setup Mode Registers Tx Reg 1 Reg 3 Reg 0 Reg 2 Rx Reg 1 Reg 3 Reg 0 Reg 5 Reg 4 Tx to Rx and Rx to Tx Reg 0 The recommended programming sequences for transmit and receive are shown in Figure 54 and Figure 55, respectively. The difference in the power-up routine for a TCXO and XTAL reference is shown in these figures. |
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