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ADF7021 데이터시트(PDF) 14 Page - Analog Devices |
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ADF7021 데이터시트(HTML) 14 Page - Analog Devices |
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14 / 64 page ![]() ADF7021 Data Sheet Rev. B | Page 14 of 64 UART/SPI Mode UART mode is enabled by setting R0_DB28 to 1. SPI mode is enabled by setting R0_DB28 to 1 and setting R15_DB[17:19] to 0x7. The transmit/receive data clock is available on the CLKOUT pin. Tx BIT Tx BIT Tx BIT Tx BIT TxRxCLK (TRANSMIT DATA INPUT IN UART/SPI MODE.) CLKOUT (TRANSMIT/RECEIVE DATA CLOCK IN SPI MODE. NOT USED IN UART MODE.) Tx MODE Tx/Rx MODE TxRxDATA (RECEIVE DATA OUTPUT IN UART/SPI MODE.) HIGH-Z Tx BIT tBIT FETCH SAMPLE Figure 8. Transmit Timing Diagram in UART/SPI Mode Rx BIT Rx BIT Rx BIT Rx BIT TxRxCLK (TRANSMIT DATA INPUT IN UART/SPI MODE.) CLKOUT (TRANSMIT/RECEIVE DATA CLOCK IN SPI MODE. NOT USED IN UART MODE.) Rx MODE Tx/Rx MODE TxRxDATA (RECEIVE DATA OUTPUT IN UART/SPI MODE.) HIGH-Z Rx BIT tBIT FETCH SAMPLE Figure 9. Receive Timing Diagram in UART/SPI Mode |
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