ICS1531 datasheet(64/76 Pages) ICST

64 / 76 page

ICS1531 Rev N 12/1/99

December, 1999

Chapter 10

Timing Diagrams

ICS1531 Data Sheet - Preliminary

10.1.2

Transfer of Data Bytes

Table 10-1 lists significant time periods for signals on SDA and SCL pins during the transfer of data bytes.

Figure 10-2 shows how bits are transferred on an industry-standard 2-wire serial bus.

• For start and stop conditions, see Section 10.1.1, “Start and Stop Conditions”.

• When there is a transfer of valid data (t1), the bits that transfer are Bits 7 through 0.

– These first 8 bits are either data or address bits that are output sequentially.

– Bit 7, the most-significant bit of these 8 bits, is output first.

– Bit 0, the least-significant bit of these 8 bits, is output last.

• After each bit transfer, a change of data occurs (t2).

• For details on the ACK signal, see Chapter 10.1.3, “Acknowledge Conditions”.

Figure 10-2.

Byte Transfer on Industry-Standard 2-Wire Serial Bus

Table 10-1.

ICS1531 Byte Transfer

Time Period

Parameter

Conditions

Min.

Typ.

Max.

Units

Data Held Valid

–

2.5

–10

µs

Change of Data Allowed

–

2.5

–10

µs

Bit 7

(MSB)

Bit 6

Bit 1

ACK

Bit 0

(LSB)

Clock from

Master Device

Data Signal

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