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AN1894 - APPLICATION NOTE

As soon as C4 voltage reaches the start-up threshold the internal 60 kHz oscillator sets the internal flip-

flop and through output driver turns-on the internal high voltage power MOSFET. The power MOSFET

applies the bulk capacitor C1 and C2 high voltage to the cathode of the power diode and to one terminal

of the inductor. Since the voltage at the output capacitor C3 connected to the inductor’s second terminal

is much lower than input bulk capacitor voltage the inductor current will ramp-up. As soon as the inductor

current ramp reaches the VIPer’s internal set-point defined by feedback loop, the internal power switch

turns off. The inductor keeps the direction of the current flowing and it reverses the voltage at C3. The

inductor current then flows through the forward biased D5 diode and charges the output capacitor C3. In

this switch-off phase the source terminal of the VIPer12 sees a negative level of the forward biased D5

(when referenced to ground) so it can be considered as grounded. This allows the inductor current to

flow also through D4 and supply the VIPer12 and give the feedback information about output voltage.

Figure 1: Schematic diagram of non isolated buck converter with positive output voltage

The output voltage of the converter at the 15V terminal is determined by the voltage drop across zener

diode D3 together with voltage drop across the resistor R3 and FB pin voltage. Resistor R3 limits the

feedback current to a safe value lower than the maximum rating specified in the data sheet. Capacitor C6

protects the FB input against EMI. One has to take into account the slight variation of the output voltage

with the load. It is because the feedback current reacts to the output load change to adopt switching duty

cycle. The variable feedback current creates different FB voltage, different voltage drop across the

resistor R3 and D3 zener voltage. The feedback current can change from 0mA (full output power) to

about 0.9mA at no output load. The R3 voltage variation is 0.9V and FB pin voltage about 1.2V. The D3

voltage variation depends on the diode V-I characteristics. Diode D6 limits the output voltage at light load

condition and it also protects the U2 voltage regulator. Regulator U2 accommodated in DPAK or SO-8

package is optional and can be assembled if the power supply for a microcontroller or logic part is

required. The DPAK package version of U2 is dedicated for 60mA output current option while U3 in SO-8

can provide max. 20mA.

L

D1

GL1M

1000V

1A

D2

GL1M

1000V

1A

VDD

4

FB

3

U1

VIPer12AS

N

D4

RGL34J

600V

0.5A

D5

RGL34J

600V

0.5A

D6

ZMM18

D3

ZMM13

VIN

8

VOUT

1

U2

L78L05CD

(1b)

C8

100nF

VDD

Assembly options:

(1a): +5V/60mA, +15V/100mA

(1b): +5V/20mA, +15V/100mA

note: all voltages refer to neutral

note: sum of currents is 100mA max.

+

C3

56uF

35V

LXY

1

2

3

CON2

clamp

R3

1k

D7

LL4148

L2

1mH

200mA

LBC

+5V

+

C2

4.7uF

400V

KMG

+

C4

10uF

50V

KME

+

C1

4.7uF

400V

KMG

VIN

VOUT

GND

U3

L78M05CDT (1a)

R5

0R

C6

22nF

90...264V~

L

N

+15V

R6

0R

L1

1.5mH 100mA

BC

Layout Hints: C4, C6 have

to be close to VIPer12A

C7

100nF

R1

10R

3W

1

2

CON1

clamp