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AN3142 데이터시트(PDF) 29 Page - STMicroelectronics |
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AN3142 데이터시트(HTML) 29 Page - STMicroelectronics |
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29 / 44 page ![]() AN3142 Designing a fixed-off-time PFC Doc ID 17005 Rev 3 29/44 Equation 60 Where fswmin is the switching frequency on the top of the sinusoid of the input voltage at VACmin = 90 VAC (Figure 18) and 220 ns is a corrector factor in order to consider the delay between the ZCD and GD signal. Considering the ratio between Equation 60, Equation 59: Equation 61 In the formula Equation 59, Equation 60, the delay between the ZCD signal and the gate drive signal is taken into account in order to increase the accuracy of the mathematical model. From the theory of the line modulation fixed off-time, TOFF is increasing with the line voltage so that at maximum line voltage the condition TON>TONmin is always true [4]. This is important in order to avoid line distortion [ 5]. Figure 18. Switching frequency function on the peak of the sinusoid input voltage waveform and the corresponding off-time value Now considering the two discharging resistors R and R0 of the circuit in Figure 6, the ratio is defined: Equation 62 max max min ON max OFF k 1 k T ) VAC ( T − ⋅ = s 1 . 6 ns 220 94 . 0 1 94 . 0 ns 450 ) VAC ( T max OFF µ = − − ⋅ = ) VAC ( T ) VAC ( T min OFF max OFF x = ρ 63 . 1 s 76 . 3 s 1 . 6 x = µ µ = ρ R R R K 0 1 + = |
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