AN3142 datasheet(32/44 Pages) STMICROELECTRONICS

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Designing a fixed-off-time PFC

AN3142

32/44

Doc ID 17005 Rev 3

Equation 72

and the Speed-Up capacitor Cs using

Equation 7:

Equation 73

That means that after calculation:

Equation 74

Equation 75

For example, a commercial value of the limiting resistor of 1 k

Ω and a speed-up capacitor of

100 pF can be selected for this application.

Pin 6 (TBO): In some applications it may be advantageous to regulate the output voltage of

the PFC preregulator so that it tracks the RMS input voltage rather than at a fixed value like

in conventional boost preregulators. This is commonly referred to as the “tracking boost” or

“follower boost” approach.

With this IC the function can be realized by connecting a resistor (RT) between the TBO pin

and ground. The TBO pin presents a DC level equal to the peak of the MULT pin voltage and

is then representative of the mains RMS voltage. The resistor defines a current, equal to

V(TBO)/RT, that is internally 1:1 mirrored and sunk from the INV pin (pin 1) input of the error

amplifier. In this way, when the mains voltage increases, the voltage at the TBO pin also

increases and therefore so does the current flowing through the resistor connected between

the TBO and GND. Then a larger current is sunk by the INV pin and the output voltage of the

PFC preregulator is forced to get higher. Obviously, the output voltage moves in the opposite

direction if the input voltage decreases. To avoid undesired output voltage rise should the

mains voltage exceed the maximum specified value, the voltage at the TBO pin is clamped

at 3 V. By properly selecting the multiplier bias it is possible to set the maximum input

voltage above which input-to-output tracking ends and the output voltage becomes

constant. If this function is not used, leave the pin open: the device regulates a fixed output

voltage.

Pin 8 (PWM_LATCH): Output pin for fault signaling. During normal operation this pin

features high impedance. If a feedback failure is detected (PFC_OK > 2.5 V & INV+40 mV <

PFC_OK) the pin is asserted high. Normally, this pin is used to stop the operation of the DC-

DC converter supplied by the PFC preregulator by invoking a latched disable of its PWM

controller. If not used, the pin is left floating.

Pin 9 (PWM_STOP): Output pin for fault signaling. During normal operation this pin features

high impedance. If the IC is disabled by a voltage below 0.8 V on the RUN pin (#10) the

voltage on the pin is pulled to ground. Normally, this pin is used to temporarily stop the

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