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AN4192 데이터시트(PDF) 34 Page - STMicroelectronics |
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AN4192 데이터시트(HTML) 34 Page - STMicroelectronics |
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34 / 47 page ![]() Low-side FET selection AN4192 34/47 Doc ID 023820 Rev 1 Figure 40. Low RG,LS(INT) (1.3 Ω) waveforms @ full load Figure 41. High RG,LS(INT) waveforms @ full load As shown in the previous images, there is a 10% reduction on the phase node spike, due to the intrinsic LS slow-down. It is important to underline that the same benefit in terms of phase node spike reduction is not evident with an RC snubber network mounted on the board, which provides the AM16483V1 AM16484V1 |
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