LTC3400/LTC3400B

6

3400fa

PCB LAYOUT GUIDELINES

The high speed operation of the LTC3400/LTC3400B

demands careful attention to board layout. You will not get

advertised performance with careless layout. Figure 2

shows the recommended component placement. A large

ground pin copper area will help to lower the chip tempera-

ture. A multilayer board with a separate ground plane is

ideal, but not absolutely necessary.

APPLICATIO S I FOR ATIO

II

VD

fL

D

OUT MAX

P

IN

()

•–

•

••

•–

=







η

2

1

where:

η = estimated efficiency

f = switching frequency (1.2MHz typical)

L = inductance value

SW

GND

FB

1

2

3

6

5

4

SHDN

SHDN

(OPTIONAL)

3400 F02

RECOMMENDED COMPONENT PLACEMENT. TRACES

CARRYING HIGH CURRENT ARE DIRECT. TRACE AREA AT

FB PIN IS SMALL. LEAD LENGTH TO BATTERY IS SHORT

Figure 2. Recommended Component Placement

for Single Layer Board

COMPONENT SELECTION

Inductor Selection

The LTC3400/LTC3400B can utilize small surface mount

and chip inductors due to their fast 1.2MHz switching

frequency. A minimum inductance value of 3.3

µH is

necessary for 3.6V and lower voltage applications and

4.7

µH for output voltages greater than 3.6V. Larger values

INDUCTANCE (

µH)

3

60

80

110

120

160

7

11 13

21

180

140

59

15 17 19

23

3400 F03

Figure 3. Maximum Output Current vs

Inductance Based On 90% Efficiency

of inductance will allow greater output current capability

by reducing the inductor ripple current. Increasing the

inductance above 10

µH will increase size while providing

little improvement in output current capability.

The approximate output current capability of the LTC3400/

LTC3400B versus inductance value is given in the equa-

tion below and illustrated graphically in Figure 3.

burst threshold, the LTC3400 will resume continuous

PWM operation seamlessly. Referring to the Block Dia-

ripple and input quiescent current during Burst Mode

220pF. The LTC3400B does not use Burst Mode operation

and features continous operation at light loads, eliminat-

ing low frequency output voltage ripple at the expense of

light load efficiency.

OPERATIO