UART implementation

AN1753

10/22

DocID9986 Rev 2

4.3

Status handling

To keep track of the status during a program execution, the software uses the “sci_status”

variable. Bits 0-4 of this variable are used to hold the system status.

Definition of each flag:

SP: Reception mode sampling phase

BR: Byte Received flag

RE: Reception Enable

BS: Byte Sent flag

TE: Transmission Enable

4.4

Transmit and receive implementation

The transmission mode gets executed after power on. To transmit data, the program uses

port pin PA3 in output mode with the “Output Compare” interrupt. One bit is transmitted

during each interrupt, generated after a bit delay when the 12-bit upcounter (CNTR) reaches

the value (=1 bit delay) stored in the DCR0H and DCR0L registers. For a duty cycle register

(DCR0L/DCR0H), the value depends on the required baud rate and clock frequency.

For receive mode, the program uses port pin PA7 in input mode along with its interrupt and

output compare functions. To sense the start bit, the “ei1” interrupt is used and configured as

“Falling edge only”. In this interrupt routine, the program sets the ATR - the output compare

mode, in order to receive the entire frame. This half bit delay is used to sample a bit in the

middle of it. After receiving a start bit in an output compare interrupt, the same interrupt

routine gets executed each time a bit must be received. To receive each bit correctly, the

majority-voting system is implemented in this interrupt routine.

The interrupt strategy used in the software to transmit and receive allows other applications

to work at the same time.

Note:

Error handling: This program does not handle communication errors (e.g. Frame Errors).

No handshaking is implemented.

For better performance at high baud rates, it is recommended to use character transmission

rather than string transmission.

SP

BR

RE

BS

TE

a.

The user can adjust this value depending on the baud rate.