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AN3181 데이터시트(PDF) 11 Page - STMicroelectronics

부품명 AN3181
상세설명  Guidelines for obtaining IEC 60335 Class B certification in an STM8 application
PDF  31 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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AN3181
Class B software package
Doc ID 17286 Rev 2
11/31
3
Class B software package
This section highlights the basic common principles used in ST software solution. The
workspace organization under different tools is described together with its configuration and
debugging capabilities.
3.1
Basic software principles
The basic software methods and common principles used for all the tests included in the ST
firmware library are described in detail at this section.
3.1.1
Fail Safe mode
FailSafe() routine is called (defined in stm8x_stl_startup.c file) at any fail detection. The
program stays in a never ending loop waiting for WDG reset. Except for some debugging
features, the routine is almost empty. When editing this routine, the user must remember to
include procedures necessary to keep the application in a safe state.
If the user wants to recognize the error raised, the debug or verbose mode described in
Section 3.3: Package configuring and debugging can be used. In debug mode the
independent WDG is refreshed inside the never ending loop to prevent resetting the
microcontroller when a failure occurs.
3.1.2
Class B variables
Class B variables are dedicated variables defined by the user as critical to the application.
They are always stored as a pair of complementary values in two separate RAM areas. Both
normal and redundant values are always placed into non-adjacent memory locations. Partial
transparent RAM March C- or March X test is performed permanently on these two regions
through the system interrupt routines in run mode. The integrity of the pair is compared
before the value is used. If any value stored is corrupted, FailSafe() routine is called. An
example of RAM configuration is shown in Figure 1. The user can adapt the RAM space
allocation according to application needs and with respect to device hardware capability.
Figure 1.
Example of RAM memory configuration for STM8S20x



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