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AN3181 데이터시트(PDF) 16 Page - STMicroelectronics |
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AN3181 데이터시트(HTML) 16 Page - STMicroelectronics |
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16 / 31 page ![]() Class B software package AN3181 16/31 Doc ID 17286 Rev 2 3.3.3 Debugging the package While debugging the package, it is useful to disable: ● Reset in FailSafe() routine by servicing independent WDG, ● All program memory CRC checksum tests when using breaks in the code to prevent program memory checksum error occurrence ● Window WDG to prevent improper service out of the time slot window dedicated to refresh(a). ● Control flow monitoring (mostly done automatically by changing values of constants when some tests are omitted) At the debugging phase it may be useful to enable: ● Verbose Diagnostic mode to watch messages at UART terminal ● LEDs toggling to see basic process flow a.Window WDG feature is not available at STM8L10x devices |
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