RM0319 datasheet(213/368 Pages) STMICROELECTRONICS

213 / 368 page

RM0319

Controller area network ports (CAN)

Doc ID 022640 Rev 3

213/368

Oscillator tolerance range

The oscillator tolerance range was increased when the CAN protocol was developed from

version 1.1 to version 1.2 (version 1.0 was never implemented in silicon). The option to

synchronise on edges from dominant to recessive became obsolete, only edges from

recessive to dominant are considered for synchronisation. The only CAN controllers to

implement protocol version 1.1 have been Intel 82526 and Philips 82C200, both are

superseded by successor products. The protocol update to version 2.0 (A and B) had no

influence on the oscillator tolerance.

The tolerance range df for an oscillator frequency fosc around the nominal frequency fnom

with depends on the proportions of Phase_Seg1, Phase_Seg2, SJW, and the bit time. The

maximum tolerance df is the defined by two conditions (both shall be met):

II:

It has to be considered that SJW may not be larger than the smaller of the phase buffer

segments and that the propagation time segment limits that part of the bit time that may be

used for the phase buffer segments.

The combination Prop_Seg = 1 and Phase_Seg1 = Phase_Seg2 = SJW = 4 allows the

largest possible oscillator tolerance of 1.58%. This combination with a propagation time

segment of only 10% of the bit time is not suitable for short bit times; it can be used for bit

rates of up to 125 kBit/s (bit time = 8 ms) with a bus length of 40 m.

15.4.20

Configuring the CAN protocol controller

In most CAN implementations, as in the current implementation in SPEAr320S, the bit

timing configuration is programmed in two register bytes. The sum of Prop_Seg and

Phase_Seg1 (as TSEG1) is combined with Phase_Seg2 (as TSEG2) in one byte, SJW and

BRP are combined in the other byte (see Figure 78).

In these bit timing registers, the four components TSEG1, TSEG2, SJW, and BRP have to

be programmed to a numerical value that is one less than its functional value; so instead of

values in the range of [1..n], values in the range of [0..n-1] are programmed. In that way, for

instance SJW (functional range of [1..4]) is represented by only two bits.

Therefore the length of the bit time is (programmed values) [TSEG1 + TSEG2 + 3] tq or

(functional values) [Sync_Seg + Prop_Seg + Phase_Seg1 + Phase_Seg2] tq.

min PhaseSeg1 PhaseSeg2

()

2x 13xbittime

PhaseSeg2

–

()

--------------------------------------------------------------------------------------

≤

SJW

20xbittime

------------------------------

≤

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