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RM0319 데이터시트(PDF) 216 Page - STMicroelectronics |
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RM0319 데이터시트(HTML) 216 Page - STMicroelectronics |
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216 / 368 page ![]() Controller area network ports (CAN) RM0319 216/368 Doc ID 022640 Rev 3 In this example, the concatenated bit time parameters are (2-1)3&(7-1)4&(1-1)2&(1-1)6, the Bit Timing register is programmed to= 0x1600. Example for Bit Timing at low Baudrate In this example, the frequency of CAN_CLK is 2 MHz, BRP is 1, the bit rate is 100 KBits/s. In this example, the concatenated bit time parameters are (4-1)3&(5-1)4&(4-1)2&(2-1)6, the Bit Timing register is programmed to= 0x34C1. tSync-Seg 100 ns = 1 * tq bit time 1000 ns = tSync-Seg + tTSeg1 + tTSeg2 tolerance for CAN_CLK 0.39 % = = tq 1 µs = 2 * tCAN_CLK delay of bus driver 200 ns delay of receiver circuit 80 ns delay of bus line (40m) 220 ns tProp 1µs = 1 * tq tSJW 4µs = 4 * tq tTSeg1 5µs = tProp + tSJW tTSeg2 4 µs = Information Processing Time + 3 * tq tSync-Seg 1µs = 1 * tq bit time 10 µs = tSync-Seg + tTSeg1 + tTSeg2 tolerance for CAN_CLK 1.58 % = = min PB1 PB2 , () 2x 13xbittime PB2 – () ------------------------------------------------------------ 0.1 μs 2x 13x1 μs0.2μs – () ------------------------------------------------------ min PB1 PB2 , () 2x 13xbittime PB2 – () ------------------------------------------------------------ 4 μs 2x 13x10 μs4μs – () ---------------------------------------------------- |
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