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AN4088 데이터시트(PDF) 35 Page - STMicroelectronics

부품명 AN4088
상세설명  Migrating between STM32F1 and STM32F0 series microcontrollers
PDF  71 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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AN4088
Peripheral migration
70
3.12
Real-time clock (RTC) interface
The STM32F0 series embeds a new RTC peripheral versus the STM32F1 series. The
architecture, features and programming interface are different.
As a consequence, the STM32F0 RTC programming procedures and registers are different
from those of the STM32F1 series, so any code written for the STM32F1 series using the
RTC needs to be rewritten to run on STM32F0 series.
The STM32F0 RTC provides best-in-class features:
BCD timer/counter
Time-of-day clock/calendar featuring subsecond precision with programmable daylight
saving compensation
Automatic wake-up unit generating a periodic flag that triggers an automatic wake-up
interrupt
A programmable alarm
Digital calibration circuit
Time-stamp function for event saving
Accurate synchronization with an external clock using the subsecond shift feature.
5 backup registers (20 bytes) which are reset when a tamper detection event occurs
For more information about STM32F0 RTC features, please refer to RTC chapter of
STM32F0xx Reference Manual (RM0091).
For advanced information about the RTC programming, please refer to Application Note
AN3371 Using the STM32 HW real-time clock (RTC).
3.13
SPI interface
The STM32F0 series embeds a new SPI peripheral versus the STM32F1 series. The
architecture, features and programming interface are modified to introduce new capabilities.
As a consequence, the STM32F0 SPI programming procedures and registers are similar to
those of the STM32F1 series but with new features. The code written for the STM32F1
series using the SPI needs little rework to run on STM32F0 series, if it did not use new
capabilities.
The STM32F0 SPI provides best-in-class added features:
Enhanced NSS control - NSS pulse mode (NSSP) and TI mode
Programmable data frame length from 4-bit to 16-bit
Two 32-bit Tx/Rx FIFO buffers with DMA capability and data packing access for frames
fitted into one byte (up to 8-bit)
8-bit or 16-bit CRC calculation length for 8-bit and 16-bit data.
Furthermore, the SPI peripheral, available in the STM32F0 family, fixes the CRC limitation
present in the STM32F1 family product. For more information about STM32F0 SPI features,
please refer to SPI chapter of STM32F0xx Reference Manual (RM0091).



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