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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD78323LP 데이터시트(PDF) 13 Page - NEC |
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UPD78323LP 데이터시트(HTML) 13 Page - NEC |
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13 / 86 page  13 µPD78323, 78324 1.2 PINS OTHER THAN PORTS (2/2) Dual- Function Pin Function Pin Name — I/O AN0 to AN7 AVREF AVDD AVSS RESET X1 X2 VDD VSS NC — — — — — — — — — — Input Input — — Input Input — –– — — A/D converter analog input. A/D converter reference voltage input. A/D converter analog power supply A/D converter GND System reset input Crystal connect pin for sysem clock oscillation. When an external clock is supplied, the clock is input to X1 and the inverted clock is input to X2. (X2 can also be left open.) Positive power supply GND pin Not internally connected. Connected to VSS (GND) (can also be left open). EA Input In the µPD78324, EA pin is normally connected to VDD. Connecting EA pin to VSS sets the ROM-less mode and accesses the external memory. In the µPD78323, this pin should be fixed to “0” (low level). The EA pin level cannot be changed during operation. |
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