PIC16F628-20SLASHSS datasheet(34/160 Pages) MICROCHIP

34 / 160 page

PIC16F62X

DS40300B-page 34

Preliminary

5.2

PORTB and TRISB Registers

PORTB is an 8-bit wide bi-directional port. The

corresponding data direction register is TRISB. A ’1’ in

the TRISB register puts the corresponding output driver

in a high impedance mode. A ’0’ in the TRISB register

puts the contents of the output latch on the selected

pin(s).

PORTB is multiplexed with the interrupt, USART, CCP

module and the TMR1 clock input/output. The standard

port functions and the alternate port functions are

shown in Table 5-3.

Reading PORTB register reads the status of the pins,

whereas writing to it will write to the port latch. All write

operations are read-modify-write operations. So a write

to a port implies that the port pins are first read, then

this value is modified and written to the port data latch.

Each of the PORTB pins has a weak internal pull-up

(

≈200 µA typical). A single control bit can turn on all the

pull-ups.

This

done

clearing

the

RBPU

(OPTION<7>) bit. The weak pull-up is automatically

turned off when the port pin is configured as an output.

The pull-ups are disabled on Power-on Reset.

Four of PORTB’s pins, RB7:RB4, have an interrupt on

change feature. Only pins configured as inputs can

cause this interrupt to occur (i.e., any RB7:RB4 pin

configured as an output is excluded from the interrupt

on change comparison). The input pins (of RB7:RB4)

are compared with the old value latched on the last

read of PORTB. The “mismatch” outputs of RB7:RB4

are OR’ed together to generate the RBIF interrupt (flag

latched in INTCON<0>).

This interrupt can wake the device from SLEEP. The

user, in the interrupt service routine, can clear the

interrupt in the following manner:

Any read or write of PORTB. This will end the

mismatch condition.

Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition, and

allow flag bit RBIF to be cleared.

This interrupt on mismatch feature, together with

software configurable pull-ups on these four pins allow

easy interface to a key pad and make it possible for

wake-up on key-depression. (See AN552 in the

Microchip

Embedded Control Handbook.)

The interrupt on change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt on change

feature. Polling of PORTB is not recommended while

using the interrupt on change feature.

Note:

If a change on the I/O pin should occur

when the read operation is being executed

(start of the Q2 cycle), then the RBIF inter-

rupt flag may not get set.

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