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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC16F628-20/SS 데이터시트(PDF) 76 Page - Microchip Technology |
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PIC16F628-20/SS 데이터시트(HTML) 76 Page - Microchip Technology |
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76 / 160 page  PIC16F62X DS40300B-page 76 Preliminary © 1999 Microchip Technology Inc. 12.1.1 SAMPLING The data on the RB1/RX/DT pin is sampled three times by a majority detect circuit to determine if a high or a low level is present at the RX pin. If bit BRGH (TXSTA<2>) is clear (i.e., at the low baud rates), the sampling is done on the seventh, eighth and ninth fall- ing edges of a x16 clock (Figure 12-3). If bit BRGH is set (i.e., at the high baud rates), the sampling is done on the 3 clock edges preceding the second rising edge after the first falling edge of a x4 clock (Figure 12-4 and Figure 12-5). FIGURE 12-1: RX PIN SAMPLING SCHEME. BRGH = 0 FIGURE 12-2: RX PIN SAMPLING SCHEME, BRGH = 1 RX baud CLK x16 CLK Start bit Bit0 Samples 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 Baud CLK for all but start bit (RB1/RX/DT pin) RX pin baud clk x4 clk Q2, Q4 clk Start Bit bit0 bit1 First falling edge after RX pin goes low Second rising edge Samples Samples Samples 12 3 4 1 2 3 4 12 |
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