PIC16C54T-HSSLASHSS datasheet(35/217 Pages) MICROCHIP

35 / 217 page

Preliminary

DS30453B-page 35

PIC16C5X

The Electrical Speciﬁcations sections show RC

frequency variation from part to part due to normal

process variation.

Also, see the Electrical Speciﬁcations sections for

variation of oscillator frequency due to VDD for given

Rext/Cext values as well as frequency variation due to

operating temperature for given R, C, and VDD values.

The oscillator frequency, divided by 4, is available on

the OSC2/CLKOUT pin, and can be used for test

purposes or to synchronize other logic.

FIGURE 7-7:

RC OSCILLATOR MODE

Note:

If you change from this device to

another device, please verify oscillator

characteristics in your application.

VDD

Rext

Cext

VSS

OSC1

Internal

clock

OSC2/CLKOUT

Fosc/4

PIC16C5X

7.3

Reset

PIC16C5X devices may be reset in one of the

following ways:

• Power-On Reset (POR)

•MCLR reset (normal operation)

• MCLR wake-up reset (from SLEEP)

• WDT reset (normal operation)

• WDT wake-up reset (from SLEEP)

Table 7-3 shows these reset conditions for the PCL

and STATUS registers.

Some registers are not affected in any reset condition.

Their status is unknown on POR and unchanged in

any other reset. Most other registers are reset to a

“reset state” on Power-On Reset (POR), MCLR or

WDT reset. A MCLR or WDT wake-up from SLEEP

also results in a device reset, and not a continuation of

operation before SLEEP.

The TO and PD bits (STATUS <4:3>) are set or

cleared depending on the different reset conditions

(Section 7.7). These bits may be used to determine

the nature of the reset.

Table 7-4 lists a full description of reset states of all

registers. Figure 7-8 shows a simpliﬁed block diagram

of the on-chip reset circuit.

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