PIC16C54T-HSSLASHSS datasheet(67/217 Pages) MICROCHIP

67 / 217 page

Preliminary

DS30453B-page 67

PIC16C54/55/56/57

PIC16C5X

11.0

ELECTRICAL CHARACTERISTICS - PIC16C54/55/56/57

Absolute Maximum Ratings†

Ambient Temperature under bias ........................................................................................................... –55

°C to +125°C

Storage Temperature.............................................................................................................................. –65

°C to +150°C

Voltage on VDD with respect to VSS ............................................................................................................... 0V to +7.5V

Voltage on MCLR with respect to VSS(2) ......................................................................................................... 0V to +14V

Voltage on all other pins with respect to VSS ................................................................................. –0.6V to (VDD + 0.6V)

Total Power Dissipation(1) ....................................................................................................................................800 mW

Max. Current out of VSS pin...................................................................................................................................150 mA

Max. Current into VDD pin......................................................................................................................................100 mA

Max. Current into an input pin (T0CKI only)

.....................................................................................................................±500 µA

Input Clamp Current, IIK (VI < 0 or VI > VDD)

....................................................................................................................±20 mA

Output Clamp Current, IOK (VO < 0 or VO > VDD)

............................................................................................................±20 mA

Max. Output Current sunk by any I/O pin ................................................................................................................25 mA

Max. Output Current sourced by any I/O pin ...........................................................................................................20 mA

Max. Output Current sourced by a single I/O port (PORTA, B or C) .......................................................................40 mA

Max. Output Current sunk by a single I/O port (PORTA, B or C) ............................................................................50 mA

Note 1: Power Dissipation is calculated as follows: Pdis = VDD x {IDD –

∑ IOH} + ∑ {(VDD – VOH) x IOH} + ∑(VOL x IOL)

Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up. Thus,

a series resistor of 50 to 100

Ω should be used when applying a “low” level to the MCLR pin rather than pull-

ing this pin directly to VSS

†NOTICE: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This

is a stress rating only and functional operation of the device at those or any other conditions above those indicated

in the operation listings of this speciﬁcation is not implied. Exposure to maximum rating conditions for extended

periods may affect device reliability.

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