| 전자부품 데이터시트 검색엔진 |
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W97AH6KB 데이터시트(PDF) 83 Page - Winbond |
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W97AH6KB 데이터시트(HTML) 83 Page - Winbond |
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83 / 127 page ![]() W97AH6KB / W97AH2KB Publication Release Date: May 15, 2014 Revision: A01-001 - 83 - 8.2.4.3 Input Signal 8.2.4.3.1 LPDDR2-800/1066 Input Signal VIL and VIH Levels With Ringback 1.550V 1.200V 0.820V 0.730V 0.624V 0.612V 0.600V 0.588V 0.576V 0.470V 0.380V 0.000V -0.350V VSS – 0.35V VSS VIL(AC) VIL(DC) VREF – AC noise VREF – DC error VREF + DC error VREF + AC noise VIH(DC) VIH(AC) VDD VDD + 0.35V Minimum VIL and VIH Levels VIH(AC) 0.820V 0.730V VIH(DC) 0.624V 0.612V 0.600V 0.588V 0.576V 0.470V 0.380V VIL(DC) VIL(AC) Notes: 1. Numbers reflect nominal values. 2. For CA0-9, CK_t, CK_c, and CS_n, VDD stands for VDDCA. For DQ, DM, DQS_t, and DQS_c, VDD stands for VDDQ. 3. For CA0-9, CK_t, CK_c, and CS_n, VSS stands for VSSCA. For DQ, DM, DQS_t, and DQS_c, VSS stands for VSSQ. |
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