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W97AH6KB 데이터시트(PDF) 19 Page - Winbond

부품명 W97AH6KB
상세설명  Four-bit prefetch DDR architecture
PDF  127 Pages
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제조업체  WINBOND [Winbond]
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W97AH6KB 데이터시트(HTML) 19 Page - Winbond

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W97AH6KB / W97AH2KB
Publication Release Date: May 15, 2014
Revision: A01-001
- 19 -
7.3
Mode Register Definition
7.3.1
Mode Register Assignment and Definition
Each register is denoted as “R” if it can be read but not written, “W” if it can be written but not read, and “R/W” if it
can be read and written.
Mode Register Read command shall be used to read a register. Mode Register Write command shall be used to
write a register.
7.3.1.1
Mode Register Assignment
MR#
MA[7:0]
Function
Access
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
0
00H
Device Info.
R
(RFU)
RZQI
DNVI
DI
DAI
1
01H
Device Feature 1
W
nWR (for AP)
WC
BT
BL
2
02H
Device Feature 2
W
(RFU)
RL & WL
3
03H
I/O Config-1
W
(RFU)
DS
4
04H
Refresh Rate
R
TUF
(RFU)
Refresh Rate
5
05H
Basic Config-1
R
LPDDR2 Manufacturer ID
6
06H
Basic Config-2
R
Revision ID1
7
07H
Basic Config-3
R
Revision ID2
8
08H
Basic Config-4
R
I/O width
Density
Type
9
09H
Test Mode
W
Vendor-Specific Test Mode
10
0AH
I/O Calibration
W
Calibration Code
11-15
0BH~0FH
(reserved)
-
(RFU)
16
10H
PASR_Bank
W
Bank Mask
17
11H
PASR_Seg
W
Segment Mask
18-19
12H~13H
(Reserved)
-
(RFU)
20-31
14h–1Fh
Reserved for NVM
32
20H
DQ Calibration Pattern A
R
See 7.4.21.2
“DQ Calibration”
33-39
21H~27H
(Do Not Use)
-
40
28H
DQ Calibration Pattern B
R
See 7.4.21.2
“DQ Calibration”
41-47
29H~2FH
(Do Not Use)
-
48-62
30H~3EH
(Reserved)
-
(RFU)
63
3FH
Reset
W
X
64-126
40H~7EH
(Reserved)
-
(RFU)
127
7FH
(Do Not Use)
-
128-190
80H~BEH
(Reserved for Vendor Use)
-
(RFU)
191
BFH
(Do Not Use)
-
192-254
C0H~FEH
(Reserved for Vendor Use)
-
(RFU)
255
FFH
(Do Not Use)
-
Notes:
1.
RFU bits shall be set to ‘0’ during Mode Register writes.
2.
RFU bits shall be read as ‘0’ during Mode Register reads.
3. All Mode Registers that are specified as RFU or write-only shall return undefined data when read and DQS shall be toggled.
4. All Mode Registers that are specified as RFU shall not be written.
5. Writes to read-only registers shall have no impact on the functionality of the device.



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