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MEC1322 데이터시트(PDF) 216 Page - Microchip Technology |
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MEC1322 데이터시트(HTML) 216 Page - Microchip Technology |
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216 / 456 page ![]() MEC1322 DS00001719D-page 216 2014 - 2015 Microchip Technology Inc. 1= Writing a one will enable respective IRQi. Reading always returns the current value of the IRQ i VECTOR ENABLE bit. The state of the IRQ i VECTOR ENABLE bit is determined by the corresponding IRQ i Vector Enable Set bit and the IRQ i Vector Enable Clear bit. (0=disabled, 1-enabled) 15.9.18 BLOCK ENABLE CLEAR REGISTER IRQ Vector Enable Clear[31:0] Each IRQ Vector can be individually disabled to assert an interrupt event to the EC. 0= Writing a zero has no effect. 1= Writing a one will disable respective IRQi vector. Reading always returns the current value of the IRQ i VECTOR ENABLE bit. The state of the IRQ i VECTOR ENABLE bit is determined by the corresponding IRQ i Vector Enable Set bit and the IRQ i Vector Enable Clear bit. (0=disabled, 1-enabled) 15.9.19 BLOCK IRQ VECTOR REGISTER Offset 204h 32-bit Size POWER VCC1 0000_0000h VCC1_RESET Default BIT D31 D30 D29 D28 D27 D26 D25 D24 TYPE R RRRRR R R BIT NAME Reserved BIT D23 D22 D21 D20 D19 D18 D17 D16 TYPE R/WC R/WC R/WC R/WC R/WC R/WC R/WC R/WC BIT NAME IRQ Vector Enable Clear [23:16] BIT D15 D14 D13 D12 D11 D10 D9 D8 TYPE R/WC R/WC R/WC R/WC R/WC R/WC R/WC R/WC BIT NAME IRQ Vector Enable Clear [15:8] BIT D7 D6D5D4D3D2 D1 D0 TYPE R RRRRR R R BIT NAME Reserved Offset 208h 32-bit Size POWER VCC1 0000_0000h VCC1_RESET Default BIT D31 D30 D29 D28 D27 D26 D25 D24 TYPE R RRRRR R R BIT NAME Reserved BIT D23 D22 D21 D20 D19 D18 D17 D16 TYPE R RRRRR R R |
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