MEC1322 datasheet(80/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 80

 2014 - 2015 Microchip Technology Inc.

5.8.1.3

LPC Clock Run

USING CLKRUN#

CLKRUN# is used to indicate the status of LCLK as well as to request that a stopped clock be started. See FIGURE

5-2: CLKRUN# System Implementation Example on page 81, an example of a typical system implementation using

CLKRUN#.

LCLK Run Support can be enabled and disabled via SIRQ_MODE as shown in Table 5-9, "LPC Controller CLKRUN#

Function". When the SIRQ_MODE is ‘0,’ Serial IRQs are disabled, the CLKRUN# pin is disabled, and the affects of Inter-

rupt requests on CLKRUN# are ignored. When the SIRQ_MODE is ‘1,’ Serial IRQs are enabled, the CLKRUN# pin is

enabled, and the CLKRUN# support related to Interrupts requests as described in the section below is enabled.

The CLKRUN# pin is an open drain output and input. Refer to the PCI Mobile Design Guide Rev 1.0 for a description

of the CLKRUN# function. If CLKRUN# is sampled “high”, LCLK is stopped or stopping. If CLKRUN# is sampled “low”,

LCLK is starting or started (running).

CLKRUN# Support for Serial IRQ Cycle

If a logical device asserts or de-asserts an interrupt and CLKRUN# is sampled “high”, the LPC Controller can request

the restoration of the clock by asserting the CLKRUN# signal asynchronously (Table 5-9). The LPC Controller holds

CLKRUN# low until it detects two rising edges of the clock. After the second clock edge, the controller must disable the

open drain driver (Figure 5-3).

The LPC Controller must not assert CLKRUN# if it is already driven low by the central resource; i.e., the PCI CLOCK

GENERATOR in Figure 5-2. The controller does not assert CLKRUN# under any conditions if the Serial IRQs are dis-

abled.

The LPC Controller must not assert CLKRUN# unless the line has been de-asserted for two successive clocks; i.e.,

before the clock was stopped (Figure 5-3).

The LPC Controller does not assert CLKRUN# if it is already driven low by the central resource; i.e., the PCI CLOCK

GENERATOR. The LPC Controller also does not assert CLKRUN# unless the signal has been de-asserted for two

successive clocks; i.e., before the clock was stopped.

Note 5-5

SIRQ_MODE is defined in Section 5.8.4.1, "Enabling SERIRQ Function," on page 84.

Note 5-6

“Change” means either-edge change on any or all parallel IRQs routed to the Serial IRQ block. The

“change” detection logic must run asynchronously to LCLK and regardless of the Serial IRQ mode;

i.e., “continuous” or “quiet”.

TABLE 5-9:

LPC CONTROLLER CLKRUN# FUNCTION

SIRQ_MODE

(Note 5-5)

Internal Interrupt

Or DMA Request

CLKRUN#

Action

None

NO CHANGE

None

CHANGE (Note 5-6)0

None

Assert CLKRUN#

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