MEC1322 datasheet(296/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 296

 2014 - 2015 Microchip Technology Inc.

FIGURE 26-4:

INTERRUPT FLOW

26.9

Fan Control Register Bank

The registers listed in the Table 26-8, "Fan Control Register Summary" are for a single instance of the RPM-PWM Inter-

face block. The addresses of each register listed in this table are defined as a relative offset to the host “Base Address”

defined in Table 26-7, "Fan Control Register Bank Base Address Table".

Note 26-1

The Base Address indicates where the first register can be accessed in a particular address space

for a block instance.

TABLE 26-7:

FAN CONTROL REGISTER BANK BASE ADDRESS TABLE

Instance Name

Instance

Number

Host

Address Space

Base Address (

Note 26-1)

RPM-PWM Inter-

face

32-bit internal

address space

4000_A000h

TABLE 26-8:

FAN CONTROL REGISTER SUMMARY

Offset

Fan Setting

00h

PWM Divide

01h

Fan Configuration 1

02h

Fan Configuration 2

03h

MCHP Reserved

04h

Gain

05h

Fan Spin Up Configuration

06h

Fan Step

07h

Fan Minimum Drive

08h

Valid Tach Count

09h

Fan Drive Fail Band Low Byte

0Ah

Fan Drive Fail Band High Byte

0Bh

Tach Target Low Byte

0Ch

Tach Target High Byte

0Dh

Tach Reading Low Byte

0Eh

Interrupt

Status Bit 1

Interrupt

Enable Bit 1

Interrupt

Status Bit n

Interrupt

Enable Bit n

Interrupt Signal

...

Interrupt Event 1

Interrupt Event n

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