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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MEC1322 데이터시트(PDF) 143 Page - Microchip Technology |
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MEC1322 데이터시트(HTML) 143 Page - Microchip Technology |
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143 / 456 page  2014 - 2015 Microchip Technology Inc. DS00001719D-page 143 MEC1322 10.13.6 EC2OS DATA EC BYTE 1 REGISTER This register is aliased; see ACPI-OS DATA BYTES[3:0] on page 135, OS2EC DATA BYTES[3:0] on page 141, and EC2OS DATA BYTES[3:0] on page 142 for detailed description of access rules. 10.13.7 EC2OS DATA EC BYTE 2 REGISTER This register is aliased; see ACPI-OS DATA BYTES[3:0] on page 135, OS2EC DATA BYTES[3:0] on page 141, and EC2OS DATA BYTES[3:0] on page 142 for detailed description of access rules. 10.13.8 EC2OS DATA EC BYTE 3 REGISTER This register is aliased; see ACPI-OS DATA BYTES[3:0] on page 135, OS2EC DATA BYTES[3:0] on page 141, and EC2OS DATA BYTES[3:0] on page 142 for detailed description of access rules. 10.13.9 EC STATUS REGISTER This register is aliased to the OS STATUS OS Register on page 136. The OS STATUS OS Register is a read only version of this register. Offset 101h Bits Description Type Default Reset Event 7:0 EC2OS_DATA_BYTE_1 This is byte 1 of the 32-bit EC2OS DATA BYTES[3:0]. R/W 0h VCC1_R ESET Offset 102h Bits Description Type Default Reset Event 7:0 EC2OS_DATA_BYTE_2 This is byte 2 of the 32-bit EC2OS DATA BYTES[3:0]. R/W 0h VCC1_R ESET Offset 103h Bits Description Type Default Reset Event 7:0 EC2OS_DATA_BYTE_3 This is byte 3 of the 32-bit EC2OS DATA BYTES[3:0]. R/W 0h VCC1_R ESET Offset 104h Bits Description Type Default Reset Event 7 UD0A User Defined R/W 0b VCC1_R ESET 6 SMI_EVT See SMI_EVT bit in OS STATUS OS Register on page 136 for bit description. R/W 0b VCC1_R ESET 5 SCI_EVT See SMI_EVT bit in OS STATUS OS Register on page 136 for bit description. R/W 0b VCC1_R ESET 4 BURST See BURST bit in OS STATUS OS Register on page 136 for bit description. R/W 0b VCC1_R ESET |
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