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A6986F 데이터시트(PDF) 15 Page - STMicroelectronics |
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A6986F 데이터시트(HTML) 15 Page - STMicroelectronics |
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15 / 72 page ![]() DocID027739 Rev 1 15/72 A6986F Functional description 72 Figure 3. Internal block diagram 5.1 Power supply and voltage reference The internal regulator block consists of a start-up circuit, the voltage pre-regulator that provides current to all the blocks and the bandgap voltage reference. The starter supplies the startup current when the input voltage goes high and the device is enabled (SS/INH pin over the inhibits threshold). The pre-regulator block supplies the bandgap cell and the rest of the circuitry with a regulated voltage that has a very low supply voltage noise sensitivity. Switchover feature The switchover scheme of the pre-regulator block features to derive the main contribution of the supply current for the internal circuitry from an external voltage (3 V < VBIAS < 5.5 V is typically connected to the regulated output voltage). This helps to decrease the equivalent quiescent current seen at VIN. (Please refer to Section 5.6: Switchover feature on page 31). 5.2 Voltages monitor An internal block continuously senses the VCC, VBIAS and VBG. If the monitored voltages are good, the regulator starts operating. There is also a hysteresis on the VCC (UVLO). RST DRIVER GND GND PEAK CL VALLEY CL ZERO CROSSING LOOP CONTROL OSCILLATOR L.N. / L.C. RST TH. LX VOUT E/A POWER PMOS POWER NMOS SENSE PMOS SENSE NMOS Vcc SLOPE VIN SYNC COMP GND DRIVER GND GND VALLEY CL LOOP CONTROL E/A POWER PMOS MOS SLOPE OVP + - MLF DELAY DELAY SS/INH SS/INH VREF 0 TSS + - FSW GDIV INT |
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