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A6986F 데이터시트(PDF) 46 Page - STMicroelectronics |
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A6986F 데이터시트(HTML) 46 Page - STMicroelectronics |
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46 / 72 page ![]() Application notes A6986F 46/72 DocID027739 Rev 1 7.4 Voltage supervisor The embedded voltage supervisor (composed of the RST and the DELAY pins) monitors the regulated output voltage and keeps the RST open collector output in low impedance as long as the VOUT is out of regulation. In order to ensure a proper reset of digital devices with a valid power supply, the device can delay the RST assertion with a programmable time. Figure 37. Voltage supervisor operation The comparator monitoring the FB voltage has four different programmable thresholds (80%, 87%, 93%, 96% nominal output voltage) for high flexibility (see Section 7.3: MLF pin on page 45, Table 7 on page 11, Table 8 on page 12, and Table 9 on page 12). When the RST comparator detects the output voltage is in regulation, a 2 A internal current source starts to charge an external capacitor to implement a voltage ramp on the DELAY pin. The RST open collector is then released as soon as VDELAY = 1.234 V (see Figure 37). The CDELAY is dimensioned accordingly with Equation 42: Equation 42 The maximum suggested capacitor value is 270 nF. CDELAY ISSCH TDELAY VDELAY ------------------------------------------ 2 AT DELAY 1.234V ------------------------------------- == |
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