A6986F datasheet(43/72 Pages) STMICROELECTRONICS

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A6986F

Closing the loop

6.5

Compensation network design

The maximum bandwidth of the system can be designed up to fSW/6 up to 150 kHz

maximum to guarantee a valid small signal model.

Equation 33

Equation 34

where:

Equation 35

p is defined by Equation 20 on page 38, gCS represents the current sense

transconductance (see Table 5: Electrical characteristics on page 8) and gm TYP the error

amplifier transconductance.

Equation 36

Example 2

Considering VIN = 12 V, VOUT = 3.3 V, L = H, COUT = 15F, fSW = 500 kHz, IOUT = 1 A.

The maximum system bandwidth is 80 kHz. Assuming to design the compensation network

to achieve a system bandwidth of 70 kHz:

Equation 37

Equation 38

so accordingly with Equation 34 and Equation 36:

Equation 39

Equation 40

The gain and phase bode diagrams are plotted respectively in Figure 32 and Figure 33.

fSW

---------

 BW C

OUT VOUT





0.85V gCS gm TYP



----------------------------------------------------------------

fPOLE







-----------

 R

C BW





--------------------------------------

fPOLE

3.5kHz

RLOAD

VOUT

IOUT

--------------

3.3



68k



165pF 180pF



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