| 전자부품 데이터시트 검색엔진 |
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A6986F 데이터시트(PDF) 24 Page - STMicroelectronics |
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A6986F 데이터시트(HTML) 24 Page - STMicroelectronics |
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24 / 72 page ![]() Functional description A6986F 24/72 DocID027739 Rev 1 5.3.2 Output voltage sequencing The A6986F device implements sequencing connecting the RST pin of the master device to the SS/INH of the slave. The slave is inhibited as long as the master output voltage is outside regulation so implementing the sequencing (see Figure 12). Figure 12. Output voltage sequencing High flexibility is achieved thanks to the programmable RST thresholds (Table 7 on page 11 and Table 8 on page 12) and programmable delay time. To minimize the component count the DELAY pin capacitor can be also omitted so the pin works as a normal Power Good. 5.4 Error amplifier The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non inverting input is connected to the internal voltage reference (0.85 V), while the inverting input (FB) is connected to the external divider or directly to the output voltage. The error amplifier output is compared with the inductor current sense information to perform PWM control. The error amplifier also determines the burst operation at light-load when the LCM is active. Table 10. Uncompensated error amplifier characteristics Description Values Transconductance 155 µS Low frequency gain 100 dB |
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