M95040-DRMF3TP datasheet(17/41 Pages) STMICROELECTRONICS

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M95040-A125 M95040-A145

Instructions

4.4

Write Status Register (WRSR)

The Write Status Register (WRSR) instruction allows new values to be written to the Status

have been executed.

The Write Status Register (WRSR) instruction is entered (MSB first) by driving Chip Select

(S) low, sending the instruction code followed by the data byte on Serial Data input (D), and

driving the Chip Select (S) signal high.

This instruction allows the user to change the values of the BP1 and BP0 bits which define

the size of the area that is to be treated as read only, as defined in Table 3: Write-protected

block size.

The contents of the BP1, BP0 bits are updated after the completion of the WRSR

instruction, including the Write cycle (tW).

The Write Status Register (WRSR) instruction has no effect on the b6, b5, b4, b1 and b0 bits

in the Status Register (see Table 2: Status Register format). Bits b7, b6, b5, b4 are always

read as 1.

The Status Register functionality is detailed in Section 3.4.2: Status Register and data

protection.

The instruction is not accepted, and is not executed, under the following conditions:

•

if the Write Enable Latch (WEL) bit has not been set to 1 (by executing a Write Enable

instruction just before)

•

if a write cycle is already in progress

•

if the device has not been deselected, by Chip Select (S) being driven high, after the

eighth bit, b0, of the data byte has been latched in

•

if Write Protect (W) is low during the WRSR command (instruction, address and data)

Figure 8. Write Status Register (WRSR) sequence

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