POWERSTEP01 datasheet(71/92 Pages) STMICROELECTRONICS

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powerSTEP01

Programming manual

When the device operates in current mode, the PRED_EN bit sets if the predictive current

control method is enabled or not.

When the device operates in current mode, the TSW bits set the target switching period of

the current control algorithm:

Any attempt to write the CONFIG register when the outputs are enabled causes the

command to be ignored and the CMD_ERROR flag to rise (see Section 11.1.28).

11.1.28

STATUS

The STATUS register has the following structure:

When HiZ flag is high it indicates that the bridges are in high impedance state. Whichever

motion command makes the device to exit from High Z state (HardStop and SoftStop

included), unless error flags forcing a High Z state are active.

The UVLO flag is active low and is set by an undervoltage lock out or reset events (power-

up included).

The UVLO_ADC flag is active low and indicates an ADC undervoltage event.

The OCD flag is active low and indicates an overcurrent detection event.

The STALL_A and STALL_B flags are forced low when a stall condition is detected on

bridge A or bridge B respectively. The stall detection is operative only when the voltage

mode control is selected.

Table 54. Motor supply voltage compensation enable

PRED_EN

Predictive current control

Disabled

Enabled

Table 55. Switching period

TSW [4 … 0]

Switching period

00000

4 μs (250 kHz)

00001

4 μs (250 kHz)

00010

8 μs (125 kHz)

11111

124 μs (8 kHz)

Table 56. STATUS register

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 15

STALL_A

STALL_B

OCD

TH_STATUS

UVLO_ADC

UVLO

STCK_MOD

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

CMD_ERR

MOT_STATUS

DIR

SW_EVN

SW_F

BUSY

HiZ

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