4.3

Required external components



COMP_1V8_ANAREXT: place an external 121 K

 1% resistor between the ball B6 and ball C6



USB_TXRTUNE: connect an external 43.2

 1% pull-down resistor to the ball AB14



COMP_3V3_ANAREXT: place an external 121 K

 1% resistor between the ball A21 and ball A22



PCIe_REFRES: place an external 487

 1% resistor between the ball R20 and ball M21 (if using PCIe interface)



DAC_REXT: place an external 7.87 K

 1% resistor between the ball V22 and ball U22



DAC_IDAC, DAC_IDACB: place an external 1% accuracy load resistor between the ball V23 and ball U23 to ground.

Y11

MFIO91

CAN2_TX

ETM_TRACE_SYNCB

Y9

MFIO92

FSMC_PCIntRq_ 4

ETM_PIPESTATA_2

Y12

MFIO93

FSMC_PCIntRq_ 3

ETM_PIPESTATA_1

AA12

MFIO94

FSMC_PCIntRq_ 2

ETM_PIPESTATA_0

AB12

MFIO95

FSMC_PCIntRq_ 1

ETM_TRACE_SYNCA

AA13

MFIO96

GPT1_CPTR2

ETM_TRACEPKTB_3

AC12

MFIO97

GPT1_CPTR1

ETM_TRACEPKTB_2

AB11

MFIO98

GPT1_CLK2

ETM_TRACEPKTB_1

AB10

MFIO99

GPT1_CLK1

ETM_TRACEPKTB_0

AC11

MFIO100

GPT2_CPTR2

ETM_TRACEPKTA_3

Y8

MFIO101

GPT2_CPTR1

ETM_TRACEPKTA_2

AC10

MFIO102

GPT2_CLK2

ETM_TRACEPKTA_1

AC9

MFIO103

GPT2_CLK1

ETM_TRACEPKTA_0

Table 16. MFIO pin descriptions (continued)

Ball no. Signal name

Muxing selection

01

2

3

4

5